Josephson junctions are becoming increasingly attractive for application in digital logic, magnetic field detection, and millimeter wave detection. The tunnel junction form of Josephson junction is already being highly developed by industry for ultrafast computers. Less attention has been given to microbridge Josephson junctions than tunnel Josephson junctions but they offer potentially significant advantages for high temperature operation as well as exhibiting other promising features associated with nonhysteretic behavior.
In the past, however, considerable difficulty has arisen in fabricating Josephson microbridges, primarily because of the small dimensions required. This is particularly true in the case of arrays of microbridges on the same chip, which must have repeatable device characteristics to be useful for applications such as digital logic and D.C. magnetometry. Typical methods used for the construction of these devices have been unsuitable for batch fabrication of arrays or required the use of electron beam lithography. This latter technique is costly and difficulty to use for 0.2 micrometer feature lithography, however, and is presently not feasible for repeatable production of features less than 0.1 micrometers. The present invention addresses these problems with a new fabrication technique that is entirely compatible with current integrated circuit technology for multi-micron dimensions and thus offers the potential of complex circuitry on a chip made up of Josephson microbridges. The use of large scale electron beam lithography coupled with this technique could produce features well under 0.1 micrometers and thus improved microbridge characteristics.